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MDU Syllabus | F-Scheme | EE-204-F DIGITAL ELECTRONICS

EE-204-F DIGITAL ELECTRONICS

SECTION-A

Digital system and binary numbers: Signed binary numbers, binary codes, cyclic codes, error detecting and correcting codes, hamming codes.

Gate-level minimization: The K-map method up to five variable, don’t care conditions, POS
simplification, NAND and NOR implementation, Quine Mc-Clusky method (Tabular method)

SECTION-B

Combinational Logic: Combinational circuits, analysis procedure, design procedure, binary adder-subtractor, decimal adder, binary multiplier, magnitude comparator, decoders, encoders, multiplexers demultiplexers

SECTION -C

Synchronous Sequential logic: Sequential circuits, storage elements: latches, flip flops, analysis of clocked sequential circuits, state reduction and assignments, design procedure. Registers and counters: Shift registers, ripple counter, synchronous counter, other counters

SECTION- D

Memory and programmable logic: RAM, ROM, PLA, PAL. Design at the register transfer level: ASMs, design example, design with multiplexers. Asynchronous sequential logic: Analysis procedure, circuit with latches, design procedure, reduction of state and flow table, race Free State assignment, hazards

Text Book:

M. Morris Mano and M. D. Ciletti, Digital Design , 4 Edition, Pearson Education

Pedroni – Digital Electronics & Design, Elsevier

R.P. Jain , “Modern digital electronics” , 3rd edition , 12th reprint TMH Publication, 2007.

Digital Design and computer organization: Nasib Singh Gill & J. B. Dixit

REFERENCE BOOKS :

• Grout – Digital Design using FPGA’S & CPLD’s, Elsevier

• F. Vahid: Digital Design: Wiley Student Edition, 2006

• J. F. Wakerly, Digital Design Principles and Practices, Fourth Edition, Prentice-Hall, 2005.

• R. L. Tokheim, Digital electronics, Principles and applications, 6th Edition, Tata McGraw Hill Edition, 2003

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